[LLVMdev] Lowering intrinsic call in the X86 backend

[Jobin, Gaël]

Hi all, 

I am trying to implement an instrinsic inside the backend through
CustomInserter. 

The raw IR code: 

> # Machine code for function main: SSA
> Frame Objects:
> fi#0: size=4, align=4, at location [SP+8]
> fi#1: size=8, align=8, at location [SP+8]
> 
> BB#0: derived from LLVM BB %entry
> %vreg4<def> = MOV64ri <ga:@.str>; GR64:%vreg4
> MOV32mi <fi#0>, 1, %noreg, 0, %noreg, 0; mem:ST4[%retval]
> MYINTRINSIC %EFLAGS<imp-def,dead>
> MOV64mr <fi#1>, 1, %noreg, 0, %noreg, %vreg4; mem:ST8[%test] GR64:%vreg4
> %vreg3<def> = MOV64rm <fi#1>, 1, %noreg, 0, %noreg; mem:LD8[%test] GR64:%vreg3
> ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def>, %RSP<imp-use>
> %RDI<def> = COPY %vreg3; GR64:%vreg3
> %AL<def> = MOV8ri 0
> CALL64pcrel32 <ga:@printf>, <regmask>, %RSP<imp-use>, %AL<imp-use>, %RDI<imp-use>, %EAX<imp-def>
> ADJCALLSTACKUP64 0, 0, %RSP<imp-def>, %EFLAGS<imp-def>, %RSP<imp-use>
> %vreg2<def> = COPY %EAX; GR32:%vreg2
> %vreg0<def> = MOV32r0 %EFLAGS<imp-def>; GR32:%vreg0
> %EAX<def> = COPY %vreg0; GR32:%vreg0
> RETQ %EAX<imp-use>
> 
> # End machine code for function main.

My intrinsic is MYINTRINSIC. I would like to split into two BB at the
location of MYINTRINSIC. 

To illustrate my problem, I added a XOR followed by a JMP to the next
BB. 

My result: 

> # Machine code for function main: SSA
> Frame Objects:
> fi#0: size=4, align=4, at location [SP+8]
> fi#1: size=8, align=8, at location [SP+8]
> 
> BB#0: derived from LLVM BB %entry
> %vreg4<def> = MOV64ri <ga:@.str>; GR64:%vreg4
> MOV32mi <fi#0>, 1, %noreg, 0, %noreg, 0; mem:ST4[%retval]
> %EDX<def,tied1> = XOR32rr %EDX<tied0>, %EDX, %EFLAGS<imp-def>
> JMP_1 <BB#1>
> Successors according to CFG: BB#1
> 
> BB#1: derived from LLVM BB %entry
> Predecessors according to CFG: BB#0
> MOV64mr <fi#1>, 1, %noreg, 0, %noreg, %vreg4; mem:ST8[%test] GR64:%vreg4
> %vreg3<def> = MOV64rm <fi#1>, 1, %noreg, 0, %noreg; mem:LD8[%test] GR64:%vreg3
> ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def>, %RSP<imp-use>
> %RDI<def> = COPY %vreg3; GR64:%vreg3
> %AL<def> = MOV8ri 0
> CALL64pcrel32 <ga:@printf>, <regmask>, %RSP<imp-use>, %AL<imp-use>, %RDI<imp-use>, %EAX<imp-def>
> ADJCALLSTACKUP64 0, 0, %RSP<imp-def>, %EFLAGS<imp-def>, %RSP<imp-use>
> %vreg2<def> = COPY %EAX; GR32:%vreg2
> %vreg0<def> = MOV32r0 %EFLAGS<imp-def>; GR32:%vreg0
> %EAX<def> = COPY %vreg0; GR32:%vreg0
> RETQ %EAX<imp-use>
> 
> # End machine code for function main.

My problem is the MOV64mr of the second BB. From an IR view, it seems
okay, but when I look at the generated ASM, it has been moved into the
first BB. More precisely, it stand between my XOR and the JMP. 

> 0x00000000004005c0 <+0>: push rbp
> 0x00000000004005c1 <+1>: mov rbp,rsp
> 0x00000000004005c4 <+4>: sub rsp,0x20
> 0x00000000004005c8 <+8>: movabs rax,0x400694
> 0x00000000004005d2 <+18>: mov DWORD PTR [rbp-0x4],0x0
> 0x00000000004005d9 <+25>: xor edx,edx
> 0x00000000004005db <+27>: mov QWORD PTR [rbp-0x18],rax
> 0x00000000004005df <+31>: jmp 0x4005e4 <main+36>
> 0x00000000004005e4 <+36>: mov rax,QWORD PTR [rbp-0x18]
> 0x00000000004005e8 <+40>: mov QWORD PTR [rbp-0x10],rax
> 0x00000000004005ec <+44>: mov rdi,QWORD PTR [rbp-0x10]
> 0x00000000004005f0 <+48>: mov al,0x0
> 0x00000000004005f2 <+50>: call 0x400490 <printf at plt>
> 0x00000000004005f7 <+55>: xor ecx,ecx
> 0x00000000004005f9 <+57>: mov DWORD PTR [rbp-0x1c],eax
> 0x00000000004005fc <+60>: mov eax,ecx
> 0x00000000004005fe <+62>: add rsp,0x20
> 0x0000000000400602 <+66>: pop rbp
> 0x0000000000400603 <+67>: ret

In this case, it has no impact. But I would like to add more code right
before the JMP and so I need a solution to move this MOV64mr before or
after my own code but not inbetween. 

Any idea? 

Gael 
 
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