[LLVMdev] Undefined combinations of operands in ISel
Dylan McKay
dylanmckay34 at gmail.com
Thu May 7 22:25:48 PDT 2015
Hello all,
I am working on an AVR backend <https://github.com/avr-llvm/llvm>. From the
instruction manual
<https://github.com/avr-llvm/architecture/raw/master/Manuals/avr-instruction-set-manual.pdf>,
there are about a dozen instructions which have (seemingly arbitrary)
constraints on their operands.
For example, take the “load from pointer P into register R and then
postincrement P” instruction:
; Prototy
; LD R, P+
; load byte from Z pointer register into r20 and postincrement
LD r20, Z+
Here is a list of undefined operand combinations:
- ELPM r30, Z+
- ELPM r31, Z+
- LD r26, X+
- LD r27, X+
- LD r26, -X
- LD r27, -X
- LD r28, Y+
- LD r29, Y+
- LD r28, -Y
- LD r29, -Y
- LD r30, Z+
- LD r31, Z+
- LD r30, -Z
- LD r31, -Z
- LPM r30, Z+
- LPM r31, Z+
- ST X+, r26
- ST X+, r27
- ST -X, r26
- ST -X, r27
- ST Y+, r28
- ST Y+, r29
- ST -Y, r28
- ST -Y, r29
- ST Z+, r30
- ST Z+, r31
- ST -Z, r30
- ST -Z, r31
How can I tell LLVM to not generate these combinations during instruction
selection?
Or maybe just a way to indicate to the register allocator that a set of
operands for an instruction is undefined in a virtual function that can be
overriden?
Thanks,
Dylan
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