[LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics

[Shahid, Asghar-ahmad]

Hi Renato,

Thanks for your response. My concern was actually this. For example, take vector type V8i16 on X86 target

With llvm.sad() intrinsic:
VC1 (Vector Cost) = Cost associated with "PSAD" instruction.

W/ llvm.absd() and llvm.hadd()
VC2  = Cost associated with "absolute diff" +  "horizontal add" ( ??? )

As I will be querying with getIntrinsicCost(ID) for these two intrinsics separately, Will VC1==VC2?

May be I am missing something obvious?

Regards,
Shahid

> -----Original Message-----
> From: Renato Golin [mailto:renato.golin at linaro.org]
> Sent: Tuesday, May 05, 2015 7:28 PM
> To: Shahid, Asghar-ahmad
> Cc: James Molloy; llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] [RFC][PATCH] Adding absd/hadd/sad intrinsics
> 
> On 4 May 2015 at 08:37, Shahid, Asghar-ahmad <Asghar-
> ahmad.Shahid at amd.com> wrote:
> > My worry is regarding the query for cost calculation for specific SAD
> > instructions such as ‘psad’ (X86) or ‘usad’ (ARM) in Loop Vectorizer.
> 
> Hi Shahid,
> 
> The vectorizer's cost model has the ability to return different costs for the
> same instruction based on the arguments (scalar/vector, big/small, special
> cases), so I don't think that adding intrisics will help you in defining the
> correct cost. This is true for all other vectorizer's decisions and it works quite
> well.
> 
> If you find something missing, maybe we should fix the cost model, not
> introduce more intrinsics.
> 
> cheers,
> --renato