[LLVMdev] missing register spills?

[Yang, Cheng-Chih]

Thanks. Let me simplify the code and post it later. After looking into it further, it looks like the "EnableJoining" path in the RegisterCoalescer class has to do with the behavior I'm seeing. Does this sound like the right direction?

- Chad

-----Original Message-----
From: mats.o.petersson at googlemail.com [mailto:mats.o.petersson at googlemail.com] On Behalf Of mats petersson
Sent: Wednesday, March 18, 2015 7:35 AM
To: Yang, Cheng-Chih
Cc: llvmdev at cs.uiuc.edu
Subject: Re: [LLVMdev] missing register spills?

Would probably help a lot of you posted some real code - both source and the generated assembly code.

--
Mats

On 18 March 2015 at 06:09, Yang, Cheng-Chih <Cheng-Chih.Yang at amd.com> wrote:
> Hi folks,
>
> I'm running into this weird issue where the register spills appear to 
> be missing for an "if" block for some reason. For example, the 
> original if/else
> blocks:
>
> ---
> if  reg0
>
> // storeRegToStackSlot for reg1
> // do something
> - missing a load for reg1?
>
> else
> // storeRegToStackSlot for reg1
> // do something
> // loadRegFromStackSlot for reg1
> end
> ----
>
> I tried looking in the LLVM spiller code but it looked like the load 
> should have already been generated at that point. Any suggestions on 
> what I should look for here?
>
> Thanks a lot!
> - Chad
>
>
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