[LLVMdev] missing register spills?

[Yang, Cheng-Chih]

Hi folks,

I'm running into this weird issue where the register spills appear to be missing for an "if" block for some reason. For example, the original if/else blocks:

---
if  reg0

// storeRegToStackSlot for reg1
// do something
- missing a load for reg1?

else
// storeRegToStackSlot for reg1
// do something
// loadRegFromStackSlot for reg1
end
----

I tried looking in the LLVM spiller code but it looked like the load should have already been generated at that point. Any suggestions on what I should look for here?

Thanks a lot!
- Chad

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