[LLVMdev] Mips patches for LLVM 3.5.2
Daniel Sanders
Daniel.Sanders at imgtec.com
Wed Mar 4 08:12:25 PST 2015
Hi Tom,
I've got a few patches that I'd like to get into 3.5.2 if I can.
* r230235 - [mips] Honour -mno-odd-spreg for vector insert/extract when MSA is enabled.
o Fixes a failure in the test-suite when -mno-odd-spreg and -mmsa are used together.
* r227089 - [mips] Enable arithmetic and binary operations for the i128 data type.
o This fixes an instruction selection failure reported by Android and a Debian package maintainer.
* r227087 - [mips] Add tests for bitwise binary and integer arithmetic operators.
o Required to make r227089 apply cleanly.
* Testcase from r221686 - [mips] Add preliminary support for the MIPS II target.
o Only the testcase minus the MIPS-II cases should be merged.
o Required to make r227089 apply cleanly.
* r226171 - [mips] Fix a typo in the compare patterns for MIPS32r6/MIPS64r6.
o Fixes bad code generation in the test-suite for certain option combinations.
* r225529 - [mips] Add support for accessing $gp as a named register.
o Fixes bad code generation in LLVMLinux
* r224425 and r225521 - [mips] Set GCC-compatible MIPS asssembler options before inline asm blocks.
o Fixes bad code generation in LLVMLinux
o Makes our inline assembly compatible with GCC's.
If you're ok with these then I'll start merging them in advance of 3.5.2-rc1.
I was considering these too but I decided against them:
* r226652 - [Mips][Disassembler]When disassembler meets load/store from coprocessor 2 instructions for mips r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method that properly handles decoding of these instructions.
o LLVM 3.5.2 doesn't have any of the test cases it modifies. I could merge the testcases too but I'm not aware of any downstream projects that need this fix.
* r227005 - [mips] Fix 'jumpy' debug line info around calls.
o The original is fairly safe, but it doesn't apply cleanly and would need some re-work that doesn't look trivial.
* r227430 - [Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.
o LLVM 3.5.2 doesn't have any of the test cases it modifies. I could merge the testcases too but I'm not aware of any downstream projects that need this fix.
Daniel Sanders
Leading Software Design Engineer, MIPS Processor IP
Imagination Technologies Limited
www.imgtec.com<http://www.imgtec.com/>
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