[LLVMdev] Alias analysis across loop iterations (aka loop carried dependency analysis)
Jeroen Dobbelaere
Jeroen.Dobbelaere at synopsys.com
Thu Jun 4 01:52:24 PDT 2015
Hi all,
With alias analysis, it is possible to detect if an access in the loop body will alias - or not.
With SCEV, you can find out how a variable evolves over different loop iterations.
Is there a pass that combines these two and can tell me
- for which n an access A in iteration X will alias with an access B in iteration X+n
and/or
- if an access A in iteration X will (not) alias with an access B in iteration X+n
?
Inside the loop vectorizer, there is a helper class (MemoryDepChecker) that seems
to do some analysis that comes close. Is that all we have or did I miss a pass ?
Thanks,
Jeroen Dobbelaere
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