[LLVMdev] [ARM backend] adding pattern for SMLALBB

Tim Northover t.p.northover at gmail.com
Mon Jun 1 06:49:54 PDT 2015


Hi Jyoti,

On 1 June 2015 at 03:05, Jyoti Rajendra Allur <jyoti.allur at samsung.com> wrote:
> In that case, we should probably remove the definitions for SMLALBB, SMLALBT, SMLALTB, SMLALTT from ARMInstrInfo.td file and add those instructions in ARMISD nodetypes?

Maybe ARMSmlal & ARMUmlal if you can't get them to work (they're
currently unused). But as you've noticed the instructions themselves
need to stay.

> It looks like we can access SMLALBB instruction from C++ only if it's present in ARMISD, is it not ?

That's correct. ARMInstrInfo.td is what tells LLVM the instruction
exists in the first place (how to print it, how to encode it, how to
parse it from assembly).

> Could you please explain "There is no smlal TableGen node, there's an SMLAL instruction"

Looks like that was wrong. ARMISD::SMLAL does exist, and an ARMSmlal
stub too. You might be able to select them from TableGen in limited
forms (probably only from a "def Pat", and don't get too tricksy),
since they hide away the 64-bit result. This works, for example:

def : Pat<(ARMSmlal GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
          (SMLAL GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi)>,
      Requires<[IsARM, HasV6]>;

It's possible the C++ in ISelDAGToDAG was written before TableGen
could do anything at all with those, though you'd have to delve into
the git log to have any chance of certainty.

Cheers.

Tim.



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