[LLVMdev] Making a CopyToReg/CopyFromReg into a zext/sext?
Matt Arsenault
Matthew.Arsenault at amd.com
Tue Jan 27 12:38:53 PST 2015
On 01/27/2015 12:28 PM, Ryan Taylor wrote:
> Thanks for getting back to me.
>
> So those nodes record if the type has already been expanded from a
> narrower type. Can you elaborate how I could use these to help? Again,
> I'm pretty unfamiliar with the SDNodes.
>
> Thanks.
What is the problem you are trying to solve? These should allow
SimplifyDemandedBits type optimizations understand that your copy
implicitly extended the source
>
> On Tue, Jan 27, 2015 at 3:22 PM, Matt Arsenault
> <Matthew.Arsenault at amd.com <mailto:Matthew.Arsenault at amd.com>> wrote:
>
> On 01/27/2015 12:16 PM, Ryan Taylor wrote:
>> I have a CopyToReg that is copying from different size types,
>> what's the best way to change that to a zext or sext node based
>> on signed or unsigned?
>>
>> I'm fairly unfamiliar with SelectionDAG process (outside of the
>> docs on llvm website).
>>
>> It seems like I should be able to insert a custom hook using the
>> register class to identify the type, potentially in
>> ISelDAGToDag.cpp or is there a better place for this to be done?
>>
>> Thanks.
>>
>
> It sounds to me like you are looking for the AssertSext /
> AssertZext nodes
>
> -Matt
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150127/7888afe3/attachment.html>
More information about the llvm-dev
mailing list