[LLVMdev] X86TargetLowering::LowerToBT
Chris Sears
chris.sears at gmail.com
Thu Jan 22 13:48:37 PST 2015
Thanks Fiona and Stehpen, let me go over this. I've been reading the Intel
optimization manual and not Agner.
The bug actually has 2 parts:
(1) in LowerToBT() there is some logic that determines whether to use a BT
or a TEST but it gets the dividing line between the two wrong:
11994,11995c11994,11997
< // Use BT if the immediate can't be encoded in a TEST instruction.
< if (!isUInt<32>(AndRHSVal) && isPowerOf2_64(AndRHSVal)) {
---
> // 16 bit mode: 32 bit mode: 64 bit mode:
> // TEST reg,imm 24b TEST reg,imm 40b TEST reg,imm
80b
> // BT reg,imm 32b BT reg,imm 32b BT reg,imm
40b
> if (AndRHSVal >= 256 && isPowerOf2_64(AndRHSVal)) {
(2) For an expression like (var & (1 << 37)) Clang emits LSHR/AND.
This actually confuses the hell out of LLVM generating fairly similar
assembly even with O3. It would be better for Clang to emit AND reg,
#(1<<37) and let LLVM recognize + optimize that.
You can argue whether BT should be emitted and I'll work through the
Intel/Agner docs. But LLVM is generating bad code from bad IR. I'll have a
patch for Clang later today and you can look these over.
BTW, macrofusion of TEST only applies for conditional jumps and not to CMOV.
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