[LLVMdev] [RFC] Integer Saturation Intrinsics

[Philip Reames]

At a very high level, why do we need these intrinsics?

What is the use case?  What are typical values for N?

Have you looked at just generating the conditional IR and then pattern 
matching late?  What's the performance trade off involved?

My default position is that we shouldn't add these unless there is a 
compelling use case.  We *still* haven't gotten the *.with.overflow 
intrinsics piped through everywhere in the optimizer.  I'm reluctant to 
keep adding new ones.

Philip

On 01/14/2015 02:08 PM, Ahmed Bougacha wrote:
> Hi all,
>
> The patches linked below introduce a new family of intrinsics, for
> integer saturation: @llvm.usat, and @llvm.ssat (unsigned/signed).
> Quoting the added documentation:
>
>        %r = call i32 @llvm.ssat.i32(i32 %x, i32 %n)
>
> is equivalent to the expression min(max(x, -2^(n-1)), 2^(n-1)-1), itself
> implementable as the following IR:
>
>        %min_sint_n = i32 ... ; the min. signed integer of bitwidth n, -2^(n-1)
>        %max_sint_n = i32 ... ; the max. signed integer of bitwidth n, 2^(n-1)-1
>        %0 = icmp slt i32 %x, %min_sint_n
>        %1 = select i1 %0, i32 %min_sint_n, i32 %x
>        %2 = icmp sgt i32 %1, %max_sint_n
>        %r = select i1 %2, i32 %max_sint_n, i32 %1
>
>
> As a starting point, here are two patches:
> - http://reviews.llvm.org/D6976  Add Integer Saturation Intrinsics.
> - http://reviews.llvm.org/D6977  [CodeGen] Add legalization for
> Integer Saturation Intrinsics.
>
>  From there, we can generate several new instructions, more efficient
> than their expanded counterpart.  Locally, I have worked on:
> - ARM: the SSAT/USAT instructions (scalar)
> - AArch64: the SQ/UQ ADD/SUB AArch64 instructions (vector/scalar
> saturating arithmetic)
> - X86: PACK SS/US (vector, saturate+truncate)
> - X86: PADD/SUB S/US (vector, saturating arithmetic)
>
> Anyway, let's first agree on the intrinsics, so that further
> development is done on trunk.
>
> Thanks!
> -Ahmed
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