[LLVMdev] [RFC] [PATCH] add tail call optimization to thumb1-only targets

Jonathan Roelofs jonathan at codesourcery.com
Mon Jan 12 07:18:23 PST 2015


Bjoern,

Thanks for the patch, this will be a really nice optimization to have :)

Would you mind using Phabricator for this? http://reviews.llvm.org/ It 
will make reviewing a bit easier on our end. It also helps if there's a 
lot of context in the diff, so `git diff -U999` is the way to go.

A few style nits:
     Please use 2-spaces instead of tabs for indentation.
     The new variable names seem a bit long compared to the rest of LLVM.

Please write some LIT test cases for this (including at least cases 
where R4 is and is not in CSI).

Correctness-wise, I'm a little concerned about forcing the call address 
into R12, as that might clash with the register scavenger (take that 
with a healthy dose of skepticism; I don't *know* that there's a problem 
here, rather I'm just uncertain how the two will interact).


Cheers,

Jon

On 1/10/15 5:31 PM, Bjoern Haase wrote:
> Hello,
>
> find enclosed a first patch for adding tail call optimizations for
> thumb1 targets.
> I assume that this list is the right place for publishing patches for
> review?
>
> Since this is my first proposal for LLVM, I'd very much appreciate your
> feedback.
>
> What the patch is meant to do:
>
> For Tail calls identified during DAG generation, the target address will
> be loaded into a register
> by use of the constant pool. If R3 is used for argument passing, the
> target address is forced
> to hard reg R12 in order to overcome limitations thumb1 register
> allocator with respect to
> the upper registers.
>
> I decided to fetch the target address to a register by a constant pool
> lookup because when
> analyzing the code I found out, that the mechanisms are prepared also
> for situations, where
> parameters are both passed in regs and on the stack. This would not be
> possible when using
> a BL // pop {pc} sequence within the epilogue since this would change
> the stack offsets.
>
> During epilog generation, spill register restoring will be done within
> the emit epilogue function.
> If LR happens to be spilled on the stack by the prologue, it's restored
> by use of a scratch register
> just before restoring the other registers.
>
> I have so far tested the code by hand with a number of tests by
> analyzing generated assembly.
> In the lit testsuite I get 4 failures which I attribute at a first
> analysis to the fact that the generated code for tail calls
> results in different output that no longer matches the expectation strings.
>
> Yours,
>
> Björn
>
>
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-- 
Jon Roelofs
jonathan at codesourcery.com
CodeSourcery / Mentor Embedded



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