[LLVMdev] type legalization/operation action

[Tom Stellard]

On Thu, Feb 19, 2015 at 11:58:44AM -0500, kewuzhang wrote:
> 
> Hi guys, 
> Talking about the following issue:
> "
> >> “
> >> def: Pat< (i16  (add i16:$src1 i16:$src2)),  ( ConvertToi16 ( IADDs   (ZERO_EXTENDx  i16:$src1)  (ZERO_EXTENDx  i16:$src2)))>
> >> “
> > 
> > This pattern is emulating 16-bit addition using a 32-bit add.
> > If you have native 16-bit instructions then you shouldn't use this
> > pattern.
> > 
> > -Tom
> 
> “
> Since I don’t have the native 16 bit operation support,  I am going to “emulate” the operations using the corresponding 32 bits ops.
> So I need the pattens like it is in above, or something like
> "
> 	def: Pat< (i16  (add i16:$src1 i16:$src2)),  ( trunc ( IADDs   (zext  i16:$src1)  (zext  i16:$src2)))>
> “
> of course, this pattern will not work, because the llvm node “trunc”, “zext” appears in the output patterns.
> However, my “trunc”, “zext” is defined as patterns, so I don’t have something native supported like “TRUNCsr”, “ZEXTsr”.
> 
> How to solve those conflicts?
> 

If you don't support native i16 operations, then don't declare i16 as a
legal type and llvm will automatically promote these nodes using 32-bit ops.

Then you will only need patterns for 32-bit instructions.

-Tom

> 
> Best
> 
> Kevin