[llvm-dev] Question about TargetLowering::SimplifyDemandedBits with AND

Tim Northover via llvm-dev llvm-dev at lists.llvm.org
Tue Dec 22 12:55:03 PST 2015

Hi Jingu,

On 22 December 2015 at 05:01, JinGu Kang via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> The target, which I am working, does not have i1's register class. It means
> that the 'truncate' is changed to its first operand 'load' during type
> legalize because it should be promoted. Therefore I have wanted to keep the
> 'and' to make correct 1 bit value. But dag combine pass is removing the
> 'and' on TargetLowering::SimplifyDemandedBits function.

This is correct, the AND is immediately followed by a TRUNCATE, which
means it's redundant.

> When I look at the
> function, even though the LHS does not have knownbit information, the code
> uses it with NewMask to compare LHS with RHS. Is it intended? Could someone
> explain it? If I missed something, please let me know.

What would normally happen is that the AND would be reinserted if
necessary during type legalization (based on a getBooleanContents
query). LLVM would decide it needed to promote the i1 operand of
SELECT to an i32. The default boolean contents are
UndefinedBooleanContent, which means that whatever implements SELECT
is only going to look at the first bit so LLVM inserts an ANY_EXTEND
which becomes a nop.

If you change that to ZeroOrOneBooleanContent then LLVM will know that
SELECT expects either a 0 or 1 in its i32 and use ZERO_EXTEND instead.
The (i32 ZERO_EXTEND i1) then gets further lowered to an AND.

Alternatively, you could change your code that actually implements
SELECT to only look at the low bit of the boolean i32. Which path is
better depends on the instructions your CPU has available, but both
could work.



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