[llvm-dev] Instruction scheduling done before or after register allocation

[Matthias Braun via llvm-dev]

Well we do both, we schedule before and after register allocation. Most targets use the MachineScheduler before register allocation and some opt in to the PostMachineScheduler after register allocation. You can look at the enableMachineScheduler() and enablePostMachineScheduler() methods.

-Matthias

> On Dec 16, 2015, at 9:06 AM, Quentin Colombet via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Hi,
> 
>> On Dec 16, 2015, at 8:02 AM, Iulia Stirb via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>> 
>> Hi,
>> 
>> I have read the steps of code generation from here: The LLVM Target-Independent Code Generator — LLVM 3.8 documentation
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>> The LLVM Target-Independent Code Generator — LLVM 3...
>> Instruction Selection Instruction Selection is the process of translating LLVM code presented to the code generator into target-specific machine instructions.
>> View on llvm.org
>> Preview by Yahoo
>>  
>> 
>> Could you please confirm that on actual implementation of LLVM's code generator, the instruction scheduling is done before register allocation?
> 
> This is correct.
> 
> Cheers,
> Quentin
> 
>> 
>> Many thanks,
>> Iulia Stirb
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