[llvm-dev] Splitting 'expand' into 'split' and `expand`.

[Matt Arsenault via llvm-dev]

> On Aug 12, 2015, at 8:36 PM, Dylan McKay <dylanmckay34 at gmail.com> wrote:
> 
> 16-bit addition is illegal, should expand into an add and an add with carry
> A few operations support 16-bit operands - the 16-bit DREGS register class
This sounds like basically the same situation AMDGPU has with 64-bit integers. Since you have a 16-bit register class, you avoid terrible problems by not having i16 be a legal type. There is no 64-bit add, and needs to be expanded into 32-bit add + carry. There are fewer 64-bit operations available, but some are. It’s faked by saying 64-bit add is legal and the expand to add + carry is handled during instruction selection, which works and also makes addressing mode matching easier.


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150812/0ca16cf0/attachment.html>