[LLVMdev] RFC: Machine Level IR text-based serialization format

[Bevin Hansson]

On 2015-04-28 20:18, Alex L wrote:
> 2015-04-28 10:15 GMT-07:00 Hal Finkel <hfinkel at anl.gov>:
> Hi Alex,
> 
> I think this looks promising. What are the 1 an 4 above? How are you
> proposing to serialize operand flags (dead, etc.)?
> 
>  -Hal
> 
> 
> Hi Hal,
> 
> The 1 and 4 above are constants that are specific to x86 memory 
> addressing,
> I believe they basically compute the address RSP + 1 * 0 + 4.
> I haven't settled on a final version of the operand flags (for 
> registers)
> syntax, but at the moment I'm thinking of something like this:
> - The IsDef flag is implied by the use of the register before the '=',
> unless it's implicit.
> - TiedTo and IsEarlyClobber aren't not serialized, as they are defined 
> by
> the instruction description. (I believe that's true in all cases, but 
> I'm
> not 100% sure).
> - IsUndef, IsImp, IsKill, IsDead, IsInternalRead, IsDebug - keywords 
> like
> 'implicit', 'undef', 'kill', 'dead' are used before the register e.g.
> 'undef %rax', 'implicit-def kill %eflags'.
> 
> I don't have a syntax for the SubReg_TargetFlags at the moment.
> 

Since the instruction format is partially based on the machine dump 
format,
you could use something similar to that, like '%reg:subreg'.

On an tangential note, IIRC the machine dumps store the virtual 
register
information (register class, mainly) in-band at the end of the 
instruction.
Based on the format you described, I'm assuming this is what would be 
stored
out-of-band in 'regInfo'.

/ Bevin