[LLVMdev] Floating point atomic load and add

David Chisnall David.Chisnall at cl.cam.ac.uk
Mon Apr 27 01:40:12 PDT 2015


On 26 Apr 2015, at 20:54, Philip Reames <listmail at philipreames.com> wrote:
> 
> The AtomicRMW instruction doesn't natively support floating point types.  You can emulate what you're looking for with a bitcast of the float to an appropriately sized integer, a AtomicRMW on that, and then a bitcast of the result.  This would have the result of CASing in the bitpattern of the original float which is probably what you intend.

AtomicRMW operations in the C11 spec are somewhat insane, as they require saving and restoring the FP state in the compare and exchange loop[1].  It’s probably quite difficult to define an AtomicRMW instructions on floating point values in the IR that would have useful semantics.  Anything that does atomic operations on floating point values is likely to have some fairly complex language-level semantics.  

David

[1] I think that this can possibly be avoided if you use Intel’s transactional memory support to implement the atomic RMW, as the instructions that change the floating point environment will cause a transaction abort, but I’m not 100% sure.



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