[LLVMdev] Loss of precision with very large branch weights
Xinliang David Li
davidxl at google.com
Fri Apr 24 12:28:06 PDT 2015
yes -- for count representation, 64 bit is needed. The branch weight
here is different and does not needs to be 64bit to represent branch
probability precisely.
David
On Fri, Apr 24, 2015 at 12:21 PM, Smith, Kevin B
<kevin.b.smith at intel.com> wrote:
> FWIW. Intel compiler's profile instrumentation uses 64 bit integer counters.
> We wrestled with similar problems for a long time before biting the bullet and switching to 64 bit counters.
>
> For 32 bit architectures this is definitely not ideal, as it now the code must to use multi-instruction sequences
> to perform the counter increments.
>
> With 64 bits, even with 1 billion counter increments/second, the range still wouldn't cause counter overflow
> for something like 800 years. So I think 64 bit scale of values is definitely enough.
>
> Kevin Smith
>
> -----Original Message-----
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Diego Novillo
> Sent: Friday, April 24, 2015 11:47 AM
> To: Xinliang David Li
> Cc: LLVM Developers Mailing List
> Subject: Re: [LLVMdev] Loss of precision with very large branch weights
>
>
>
> On 04/24/15 14:44, Xinliang David Li wrote:
>>
>> Isn't that the direct result of the branch weights not being scaled
>> (after reaching the cap) -- thus leading to wrong branch probability
>> (computed from weights)? Wrong probability leads to wrong Frequency
>> propagation.
>
> Yup, I'm trying to see if we couldn't just use 64bit values all over to
> make things easier. The drawback would be that we are just punting the
> problem to a different scale of values (but, it may be enough).
>
>
> Diego.
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
More information about the llvm-dev
mailing list