[LLVMdev] Why are imm shifts where imm >= width type eliminated entirely?

Matt Arsenault Matthew.Arsenault at amd.com
Mon Apr 20 13:33:42 PDT 2015


On 04/20/2015 01:25 PM, David Majnemer wrote:
> These optimizations are not always run on IR that is fed to the backend.
The DAG combiner also performs the undefined shift -> undef though, so 
it should still be OK

-Matt



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