[LLVMdev] remove redundant load by GVN() does not work
Daniel Berlin
dberlin at dberlin.org
Sat Apr 18 22:56:37 PDT 2015
Add basicaa. Without aa, it won't touch these
On Sat, Apr 18, 2015, 8:33 PM Xiangyang Guo <xguo6 at ncsu.edu> wrote:
> Hi,
>
> Assume I have the following code. The first four instructions in each BB
> does the same thing. So I think GVN() can remove the redundant code.
> However, after I apply GVN to my module by "Passes.add(createGVNPass())"
> and "Passes.run(*myModule)". It seems GVN does not remove the redundant
> instructions. Can anyone give me a hint what's going on here? Any hint is
> appreciable.
>
> *********************************************************************
> cond_3: ; preds = %cond_1_else
> %a1 = load i32** @a
> %v41 = load i32* %v4
> %6 = getelementptr i32* %a1, i32 %v41
> %7 = load i32* %6
> %8 = icmp slt i32 %7, 1
> br i1 %8, label %cond_4, label %cond_4_else
>
> cond_4_else: ; preds = %cond_3
> %a2 = load i32** @a
> %v42 = load i32* %v4
> %9 = getelementptr i32* %a2, i32 %v42
> %10 = load i32* %9
> %11 = icmp sgt i32 %10, %v6_int_34
> br i1 %11, label %cond_4, label %cond_4_else1
>
> cond_4_else1: ; preds = %cond_4_else
> %a3 = load i32** @a
> %v43 = load i32* %v4
> %12 = getelementptr i32* %a3, i32 %v43
> %13 = load i32* %12
> %v5_int_42 = srem i32 %v2_int_.0, %13
> %14 = icmp eq i32 %v5_int_42, 0
> br i1 %14, label %cond_4_else2, label %cond_4
>
> ************************************************************************
> (I change the variable's name a little bit for the first four instructions
> in each BB because the name of variables in my original IR has a long.)
>
> Regards
>
> Xiangyang
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