[LLVMdev] MMX/SSE subtarget feature in IR

[suyog sarda]

Hi Kevin,

I had another query for 32 bit x86. (Apology for being naive)

I guess the default CPU on 32-bit x86 is 'pentium4', which has SSE as seen
in getX86TargetCPU() in tools/clang/lib/Driver/Tools.cpp:

static const char *getX86TargetCPU(const ArgList &Args,
                                   const llvm::Triple &Triple) {
...
  // Everything else goes to x86-64 in 64-bit mode.
  if (Is64Bit)
    return "x86-64";

  switch (Triple.getOS()) {
  case llvm::Triple::FreeBSD:
  case llvm::Triple::NetBSD:
  case llvm::Triple::OpenBSD:
    return "i486";
  case llvm::Triple::Haiku:
    return "i586";
  case llvm::Triple::Bitrig:
    return "i686";
  default:
    // Fallback to p4.
    return "pentium4";
  }
}


Is there any 32-bit CPU with MMX feature but without SSE feature?

Can it be done as follows :

$ clang 1.c -mmmx -mno-sse -emit-llvm -S -target i386.

My intention is to generate IR for x86 32 bit CPU with MMX feature but
without SSE feature and further investigate if vectorization triggers for
32 bit architecture with MMX feature only.

Thanks.

Regards,
Suyog Sarda
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