[LLVMdev] Behaviour of NVPTX intrinsic

[RAVI KORSA]

The actual purpose that I wanted such an intrinsic is to solve a problem
similar to this one in X86. Say I wanted to read the "mxcsr" register(which
is the status register for SSE instructions) after a particular
instruction, then I need a kind of barrier intrinsic which will not allow
the arithmetic instructions to move around it. Or else I will be reading
the status of some other instruction.

Thanks
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