[LLVMdev] mips fast-isel port

[reed kotler]

Not that I think there is much chance that anyone else is thinking of 
submitting fast-isel patches for Mips but...

I am very far a long in this port; almost to where the ARM port for 
example was when they first enabled fast-isel as the default for -O0.
It's not really our plan to make this the default right now but I'm just 
saying where we are.

I'm starting to catch up on the patch push and review so hopefully I 
will get it all in over the next few weeks.

Just a warning to anyone wanting to add to what is there that it would 
for sure conflict with what is in my
plan.

I have reorganized it all now to be as close as possible to the AARch64 
fast-isel port which seems to be the
cleanest to me and especially in call lowering and call return and some 
of the other more complex areas.
This reorganization is a later one in my queue of patches but that is 
where it is all at right now internally at Mips.

I'm so close to AARch64 port that I think that seriously in the future 
this could all be merged into target independent
code with some small amount of virtual functions or other configuration 
methods.

All the hard things have been implemented so my belief is that the rest 
will go quickly with the AArch64 as the main
reference design; of course consulting the other ports too.

Reed