[LLVMdev] writeNopData and non-instructions in .text
Joerg Sonnenberger
joerg at britannica.bec.de
Tue Sep 16 19:46:58 PDT 2014
Hi all,
all ELF platforms at least and likely all others too allow something
like the following:
.text
.asciz "arbitrary long string"
.p2align 3
Depending on the size of the string, MCAsmBackend::writeNopData is
called to pad text. For x86 and other backends with byte-sized
instructions, this is no problem. Some backends like ARM and PPC
flush explicitly to 16bit/32bit boundaries. There is an interested
question on whether the non-instructions should be leading or trailing
-- I think the behavior in ARM and PPC is wrong in this regard. The R600
backend seems to be just broken by not writing anything. This leaves
SPARC and Mips. Both currently just return false if the padding is not a
multiply of 32bit and the caller just reports an error.
All this makes me wonder:
(1) Why do we allow the backend to fail at all? Shouldn't the
"pad-with-0" or so behavior be the default?
(2) What is the expected order? Pad to instruction size first or last?
Joerg
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