[LLVMdev] understanding DAG: node creation

[Tom Stellard]

On Sun, Aug 31, 2014 at 01:18:38AM +0400, Dmitri Kovalenko wrote:
> I have an intrinsic and it must be lowered to instruction, which works with
> fixed register.
> So, it takes contents of this register and another argument as input. After
> execution, the result of the instruction is placed into that same fixed
> register.
> 
> What should I do in SelectionDAGBuilder::visitIntrinicCall to describe such
> behaviour for a SDNode?

If this is a target specific intrinsic, you should custom lower it in
XXXTargetLowering::LowerOperation().  There are several examples of this
in lib/Target/

-Tom

> 
> Thank you for the ideas and insights.
> -- 
> Sincerely,
> Dmitri Kovalenko

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