[LLVMdev] assembler instruction selection vs. compiler instruction selection

[Francois Pichet]

On Fri, Oct 3, 2014 at 5:16 PM, Steve King <steve at metrokings.com> wrote:

> Hello LLVM,
>
> Suppose I have many instructions with AsmString "foo  $src".  The
> specific foo opcode depends on the value of $src.  I arrange
> AsmOperandClasses and superclasses for $src so the assembler picks the
> right foo.  That seems fine as far as the assembler goes.
>
> During compiler instruction selection, I can use a CodeGenOnly=1
> pseudo with assembly "foo $src" and emit .s files from llc.  These go
> to the assembler which chooses the foo opcode using the
> AsmOperandClass hierarchy.  The compiler didn't have to worry about
> which foo is the right foo.
>
> However, I want to use llc's ability to produce object files directly.
> That path skips assembly parsing, so my AsmOperandClass logic can't
> help pick the right foo, correct?
>
> What is the right approach?  Do I add DAG pattern matching logic to
> mirror all the AsmOperandClass selection logic?  If so, is there an
> easy way to detect if assembler instruction selection and compiler
> instruction selection are out of sync?
>
> Thanks,
> -steve
>

CodeGen and ASM operands matching mechanisms are different.

You can do something like this:
  def Foo_AsmOperand: AsmOperandClass {
    let Name = “Foo”;
    let PredicateMethod = "is_Foo";
  }
  def Foo_Operand : Operand<i32>, ComplexPattern<i32, 1, "Select_Foo",
[imm], []> {
    let ParserMatchClass = Foo_AsmOperand;
  }

You can manage by having is_Foo and Select_Foo share logic by calling the
same common function.
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