[LLVMdev] How to make correct pattern for instruction?

[Carlos Almeida Jr.]

Johnny,
It makes sense!
I will try fix the code.

Thank you for the tips!!

Cheers,

Carlos Almeida Jr

On Thu, Nov 27, 2014 at 9:19 AM, Johnny Val <johnnydval at gmail.com> wrote:

> On Thu, Nov 27, 2014 at 11:07 AM, Carlos Almeida Jr.
> <almeidajr at gmail.com> wrote:
> >
> > Hi Johnny,
> >
> > Thank you for your help. I guess the pseudo instruction does not
> interfere in the generated assembly code.
> > I'll check the file that describes the registers and I hope understand
> why the assembly code is printed wrong (now is printed things like add r1,
> r0, -40).
>
>
> It is printing things like that because you have an instruction which
> lets you you add a register and an immediate. If you remove that
> instruction LLVM will do what you want.
>
> For your specific case (modifying CPU0) if you remove:
>
> def ADDiu   : ArithLogicI<0x09, "addiu", add, simm16, immSExt16, CPURegs>;
>
> from CPU0InstrInfo.td then you should get the output you expect.
>
> >
> > Cheers,
> > Carlos
> >
> > Carlos Almeida Jr
> >
> > On Thu, Nov 27, 2014 at 7:56 AM, Johnny Val <johnnydval at gmail.com>
> wrote:
> >>
> >> Hi Carlos,
> >>
> >> LLVM will do this automatically for you! There is no need for a pseudo
> instruction in this case. As long as you have a way of adding two i32s (or
> any other type) using registers then LLVM will automatically do what you
> described when immediates are involved.
> >>
> >> Cheers,
> >>
> >> Johnny
> >>
> >> On Wed, Nov 26, 2014 at 11:50 PM, Carlos Almeida Jr. <
> almeidajr at gmail.com> wrote:
> >>>
> >>> Hi,
> >>>
> >>> I'm a beginner user using LLVM, and I'm trying to create a new backend
> using CPU0 Tutorial as reference.
> >>> I have two instructions for add: add and addi (this is a pseudo
> instruction, but imediate operations is not available in architecture).
> >>> That is my idea: When the LLVM instruction selection find addi r3 = r2
> + value
> >>>
> >>> must convert to this:
> >>>
> >>> - load r1, value
> >>> - add r3 = r2 + r1
> >>>
> >>> In archInstrInfo.td I declared the instructions of the architecture,
> but I dont know how to "split" addi instruction. I tryed understand the
> LLVM and CPU0 documentation for solve this but I not found anything. :(
> >>>
> >>> Could anyone help me?
> >>>
> >>> Thanks
> >>> Carlos
> >>>
> >>> _______________________________________________
> >>> LLVM Developers mailing list
> >>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> >>>
> >>
> >
>
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