[LLVMdev] [GSoC 2014] Generalize the type legalization to support SIMD integer types

[Meng Lin]

Dear all,

I'm a master student and this is my proposal for Google Summer of Code 2014:

Our goal is to provide a systematic approach to supporting SIMD integer types, such that all of the following types are legal on all architectures supporting 128-bit SIMD registers: <128 x i1>, <64 x i2>, <32 x i4>, <16 x i8>, <8 x i16>, <4 x i32>, <2 x i64>, <1 x i128>. We want to provide methods for implementing each of the standard integer operations on each type, in the absence of native implementations. Each of these will be implemented as a suitable expansion within the Legalize framework of the LLVM code generator.

Our lab applies SIMD to text processing applications and we have a solid high performance SIMD library called IDISA (http://parabix.costar.sfu.ca/wiki/IDISAproject). IDISA has two features:

1.     Simple uniform API for different CPU architecture(SSE, AVX, NEON)

2.     Wider range of field width for each SIMD operation. Example: Intel SSE2 only support “max” for <8 x i16>; IDISA extends it into all <128 x i1>, <64 xi2>…<2 x i64>, <1 x i128>

We want to contribute to LLVM by integrating IDISA into the code generator, hoping to improve LLVM’s performance on SIMD-intensive applications.
 
This project will be my master thesis and the mentorship from LLVM developers is the best. Please contact me if you are interested in this idea and we may iterate further on this proposal. BTW, can I submit this idea to Google Melange system?

Best,
Meng Lin