[LLVMdev] problem with X86's AVX assembler?

[Jun Koi]

On Fri, Jun 27, 2014 at 5:17 AM, Adam Nemet <anemet at apple.com> wrote:

>
> On Jun 25, 2014, at 10:40 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>
>
>
> On Thu, Jun 26, 2014 at 10:23 AM, Adam Nemet <anemet at apple.com> wrote:
>
>>
>>
>> On Jun 25, 2014, at 7:05 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>>
>>
>>
>>
>> On Thu, Jun 26, 2014 at 5:47 AM, Adam Nemet <anemet at apple.com> wrote:
>>
>>> Hi Jun,
>>>
>>> On Jun 25, 2014, at 8:14 AM, Jun Koi <junkoi2004 at gmail.com> wrote:
>>>
>>> > Hi,
>>> >
>>> > I am trying to assemble below instruction with latest LLVM code, but
>>> fail. Am I doing something wrong, or is this a bug?
>>> >
>>> >
>>> > $ echo "vaddps zmm7 {k6}, zmm2, zmm4,
>>> {rd-sae}"|./Release+Asserts/bin/llvm-mc -assemble -triple=x86_64 -mcpu=knl
>>> -show-encoding -x86-asm-syntax=intel
>>> >     .text
>>> > <stdin>:1:31: error: unknown token in expression
>>> > vaddps zmm7 {k6}, zmm2, zmm4, {rd-sae}
>>> >                               ^
>>> > <stdin>:1:31: error: unknown token in expression
>>> > vaddps zmm7 {k6}, zmm2, zmm4, {rd-sae}
>>>
>>> Unfortunately, I don’t think sae is supported yet.  (I think the ^ is
>>> misplaced; it should point to the {rd-sae}.)
>>>
>>> (I may be wrong here but looks like even the X86AsmParser is lacking
>>> support for sae even though some instruction in the .td file contain {sae}
>>> in their asm syntax.)
>>>
>>
>> Oh it seems also the disasm support for sae is lacking:
>>
>> $ echo "62 f1 6c 1e 58 fc"|./Release+Asserts/bin/llvm-mc -disassemble
>> -triple=x86_64
>>     .text
>> <stdin>:1:4: error: invalid input token
>> 62 f1 6c 1e 58 fc
>>
>>
>> That's not too surprising; assembler and disassembler support go hand in
>> hand.
>>
>> I hope there is a plan to o support this SAE stuff soon?
>>
>>
>> Assembler support is in pretty good shape otherwise. I expect that this
>> will be added as soon as someone really needs it. Help is always welcome ;)
>>
>>
> Yes, I would love to, but do not know where to fix.
>
> Seems like I need to work on the lib/Target/X86/X86InstrAVX512.td file to
> add the missing SAE support?
>
>
> I think it will be a bit more involved than that.  As I said, I don’t
> think even the parser supports RC or SAE.  See
> lib/Target/X86/AsmParser/X86AsmParser.cpp.
>
> Looks like that some instructions have RC operands
> (see avx512_vcvt_fp_with_rc) and also a bit of support in the InstPrinter
> (X86ATTInstPrinter::printRoundingControl).  I am actually not sure that
> that is properly hooked up in the disassembler.
>
>
yes, it seems even there are some little code supporting SAE & Rounding
mode in the source, nothing works: I tried many binary sequence having SAE,
but "llvm-mc -disassemble" never can decode them.

so on this part we are behind both Gnu Gas & Nasm: they both can assemble &
disassemble (Nasm) AVX512 code with SAE & rounding mode.


thanks,
Jun
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