[LLVMdev] Is there any tool can generate MIPS ELF file?

[Eric Christopher]

On Mon, Jun 23, 2014 at 2:45 AM, Daniel Sanders
<Daniel.Sanders at imgtec.com> wrote:
>> There are a lot of MIPS ABIs.
>
> Yes, and we've discovered that there seem to be incompatible extensions to some of these ABI's too.

:)

>
>> I'm pretty sure Imagination Technologies working up a new abi right now.
>
> Not exactly. We're not working on any completely new ABI's but we are fixing a compatibility flaw between the O32 ABI and a (currently) unsupported extension that allows the efficient use of FR=1 mode (FPU with 64-bit registers). This is going to be important since MIPS32r6/MIPS64r6 will not have direct support for FR=0 mode (FPU with 32-bit registers). At the moment, this extension is available in all the tools and is enabled with -mfp64. Unfortunately, it is not possible to inter-link O32 and O32+fp64 code since they require the FPU to be in different modes. To fix the compatibility flaw, we are adding an O32 extension called fpxx (enabled with -mfpxx) which operates correctly in both FPU modes and is essentially O32 with some minor restrictions. O32+fpxx is ABI-compatible with O32 and O32+fp64 and can inter-link with either but not both at the same time (because they conflict with eachother). The intention is that as code is re-compiled, O32+fpxx will replace O32 and we will end up the mode requirements being either 'FR=1' or "don't care".
>
> In case you're curious, the fpxx restrictions are:
> * Use of mtc1, mfc1, lwc1, and swc1 on the upper 32-bits of a double precision value is not permitted.
> * Some callee-saved registers are also treated as caller-saved.
>

Well, this is definitely ABI breaking, so effectively a new ABI is what I meant.

Curious why an extension to o32 for this and not, for example, just using n32?

-eric

>> -----Original Message-----
>> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu]
>> On Behalf Of Eric Christopher
>> Sent: 18 June 2014 18:48
>> To: Matheus Almeida
>> Cc: LLVM Developers Mailing List
>> Subject: Re: [LLVMdev] Is there any tool can generate MIPS ELF file?
>>
>> On Wed, Jun 18, 2014 at 2:03 AM, Matheus Almeida
>> <Matheus.Almeida at imgtec.com> wrote:
>> >> Why Imagination Technologies do not offer the latest MIPS ABI document
>> download link just like the ISA docs?
>> > It's something we're considering to do and the documents should be
>> available at some point in the [hopefully] not too distant future.
>> >
>> >> then why GCC disagree with some MIPS ABI, it should be freely designed
>> by MIPS ABI designer and compiler backend target implementation.
>> > I don't have a very good explanation to this question. The ABIs were
>> implemented a long time ago and I can only guess at this point but I'd say that
>> there were some misinterpretations of the spec and given the popularity of
>> GCC, the implementation became the new standard and it's something that
>> LLVM needs to cope with.
>> >
>>
>> There are a lot of MIPS ABIs.
>>
>> o32, n32, n64 - These came from the SGI world for IRIX originally, but were
>> also adopted for linux and used in gcc for both.
>> o64 - Invented at Cygnus for 64-bit processors eabi - Different one invented
>> at Cygnus meabi - Invented with MIPS and Cygnus (and possibly others) in
>> the late 90s as a new embedded abi.
>> And there's been at least one or two other ABIs since - I'm pretty sure
>> Imagination Technologies working up a new abi right now.
>>
>> -eric
>>
>> > Regards,
>> > Matheus
>> >
>> > -----Original Message-----
>> > From: Nancy [mailto:nancydreaming at gmail.com]
>> > Sent: 17 June 2014 13:56
>> > To: Matheus Almeida
>> > Cc: LLVM Developers Mailing List
>> > Subject: Re: [LLVMdev] Is there any tool can generate MIPS ELF file?
>> >
>> > Thank you very much for your information and documents!
>> >
>> > Why Imagination Technologies do not offer the latest MIPS ABI document
>> download link just like the ISA docs? If they thought no much people
>> interested in that doc, they had to make greate effort on compiler like
>> GCC,LLVM by themself,then why GCC disagree with some MIPS ABI, it
>> should be freely designed by MIPS ABI designer and compiler backend target
>> implementation. Do I miss something?
>> >
>> > --
>> > Best Regards,
>> > Yu Rong Tan
>> >
>> > On Mon, Jun 16, 2014 at 5:30 PM, Matheus Almeida
>> <Matheus.Almeida at imgtec.com> wrote:
>> >> Could you be more specific about what ABIs are you after ? The reason
>> I'm asking is that there are several ABIs available for Mips and only a few of
>> them are supported by LLVM (o32, n32 and n64). There are several ABIs
>> defined by GNU with very little documentation that describes them (EABI is
>> one example).
>> >>
>> >> We are aware that the available documentation and GCC disagree
>> sometimes and given that GCC is the de-facto standard, LLVM tries to follow
>> GCC's behaviour as close as possible.
>> >>
>> >> As far as I know there isn't any link from Imagination Technologies'
>> website that I can point you to w.r.t ABIs but there's documentation out
>> there like:
>> >> https://dmz-portal.mips.com/mw/images/f/fe/MD00305-2B-ABIDESC-
>> SPC-01.03.pdf   // This is probably the best document as it compares the 3
>> most important ABIs. Note that it's an old document and needs some
>> refactoring given that the implementation in GCC sometimes differs from the
>> documentation.
>> >> http://math-atlas.sourceforge.net/devel/assembly/mipsabi32.pdf // O32
>> >> ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/MIPS-N32-ABI-
>> Handbook.
>> >> pdf //n32
>> >>
>> >> Regards,
>> >> Matheus
>> >>
>> >
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