[LLVMdev] constraining two virtual registers to be the same physical register

Pete Cooper peter_cooper at apple.com
Tue Jun 10 20:13:08 PDT 2014


On Jun 10, 2014, at 6:49 PM, reed kotler <rkotler at mips.com> wrote:

> On 06/10/2014 05:51 PM, Pete Cooper wrote:
>> Hi Reed
>> 
>> You can do this on the instruction itself by telling it 2 operands must be the same register.  For example, from X86:
>> 
>> let Constraints = "$src1 = $dst" in
>>     defm INSERTPS : SS41I_insertf32<0x21, "insertps">;
>> 
>> Thanks,
> Hi Pete,
> 
> Sorry.
> 
> I should have been more specific.
> 
> I'm looking for a way to do this in c++.
Ah, in that case have a look at MachineInstr::tieOperands.

Thanks,
Pete
> 
> I'm aware of how it is done in tablegen.
> 
> Reed
> 
>> Pete
>>> On Jun 10, 2014, at 5:38 PM, reed kotler <rkotler at mips.com> wrote:
>>> 
>>> Does anyone know if there is a way to constrain two virtual registers to be allocated
>>> to the same physical register?
>>> 
>>> Tia.
>>> 
>>> Reed
>>> _______________________________________________
>>> LLVM Developers mailing list
>>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
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>> 
> 

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