[LLVMdev] InsertElementInst and ExtractElementInst

[Tim Northover]

Hi Vasilis,

> %"ins or1" = insertelement <3 x i32> undef, i32 %38, i32 0
> %"ins and2" = insertelement <3 x i32> undef, i32 %41, i32 1
> %"ins xor3" = insertelement <3 x i32> undef, i32 %43, i32 2
> %extract4 = extractelement <3 x i32> undef, i32 %35

You're always inserting and extracting with "undef". There's nothing
linking these operations at all. You actually want them to form a
chain (so %"ins and2" inserts into the %"ins or1" value, ..., %extrac4
extracts from "%ins xor3").

> The output of my program is different that the expected one, like the
> extractelement takes an undefined value.

It does.

> The instructions I used are:
> Instruction *Insert0 = InsertElementInst::Create(vector, Or_set, index0,
> "ins or");
> ..
> Instruction *extract = ExtractElementInst::Create(vector, ch, "extract");
> //where ch takes a value from 0 to 2
> instr->replaceAllUsesWith(extract); //where I want to replace the instr
> instruction with the instruction from the vector.

OK, it looks like you're trying to use the IR in a C-like (non SSA)
manner. You might want to read around about SSA ("single static
assignment") form if you haven't already.

In this case, the variable "vector" isn't changed by any of these
operations, it starts as UNDEF (I assume) and remains UNDEF throughout
(the instructions don't assign to it). The vector-with-Or_set-inserted
is "Insert0", so that's what you should use in the next insert, and so
on.

Cheers.

Tim.