[LLVMdev] Lowering to return multiple values: codeGen, instruction write one value to the input register.

[kewuzhang]

Hi All, 

In XCore backend,  I saw 
“
…...
  EVT VT = Op.getValueType();
      SDValue Data =
        DAG.getNode(XCoreISD::CRC8, DL, DAG.getVTList(VT, VT),
                    Op.getOperand(1), Op.getOperand(2) , Op.getOperand(3));
      SDValue Crc(Data.getNode(), 1);
      SDValue Results[] = { Crc, Data };
      return DAG.getMergeValues(Results, 2, DL);
“  which is used to lower an instruction that returns two values.

I am trying to something like this:
”
…….
SDValue z = DAG.getNode(my_ISD::test_op, DL, VT, Op.getOperand(0);
SDValue w = DAG.getConstant(1, MVT::i32);

SDValue DataZ = DAG.getNode(ISD::BUILDER_VECTOR, DL, MVT::v4i32, z, z, z, z);
SDValue DataW = DAG.getNode(ISD::BUILDER_VECTOR, DL, MVT::v4i32, w, w, w, w);
SDValue result[] = {DataZ, DataW};
return DAg.getMergeValues(results, 2, DL);

“
but my view-dag only shows one return value,  wondering what is wrong? 
should the results dags must be somehow “dependent” on each other?

Best

kevin

On Jul 7, 2014, at 2:54 PM, Tim Northover <t.p.northover at gmail.com> wrote:

>> Now I am having the same problem as mentioned in this
>> thread;"http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-January/057654.html”
>> 
>> [...]
>> 
>> Wondering if there is any update about it?
> 
> This has been a known issue since almost the beginning of LLVM from
> what I've picked up (certainly long before I'd even heard of the
> project). There hasn't been any progress since those messages, I'm
> afraid: for two or more generic outputs you need C++ for ISel
> (usually).
> 
> Cheers.
> 
> Tim.

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