[LLVMdev] Instructions on a target with no general purpose registers

[Owen Anderson]

Hi Edwin

I’ve refrained from raining on your other thread, but LLVM’s instruction selection model, and in fact a large portion of its code generation model, is not well-fitted to modeling the 6502.  I don’t think you’re going to get significant benefit from trying to bend it to work for the 6502, and you’ll spend a lot of time working around baked in assumptions that aren’t true for your target.

—Owen


On Jul 5, 2014, at 6:59 AM, Edwin Amsler <edwinguy at gmail.com> wrote:

> I've mentioned my sneaky plans to target the MOS6502 here before.
> 
> The big issue I think is that a lot of instructions don't really have a choice for output register. It all just goes into the accumulator, X index, or Y index based on the specific instruction.
> 
> So, my question is, when I'm defining my ins, outs and registers for these instructions, is it going to be a problem that different instructions outputs are defined by the function that is called? And I guess, how do I tell LLVM it can't pick any old register for a given instruction?
> 
> Thanks,
> 
> Edwin
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