[LLVMdev] [PATCH] R600 - Fix zero extend of i1

Jon Pry jonpry at gmail.com
Wed Jan 1 18:42:05 PST 2014


> This patch looks good, but you need to add a test case.  You can add it
> to the file test/CodeGen/R600/zero_extend.ll

Version 2 of patch attached which includes test case.


-Jon
-------------- next part --------------
From 4729d848f7db69bf361c5cab4689af1fd96f98a8 Mon Sep 17 00:00:00 2001
From: Jon Pry <jonpry at gmail.com>
Date: Wed, 1 Jan 2014 21:37:17 -0500
Subject: [PATCH] R600 - Fix zero extend of i1

---
 lib/Target/R600/SIInstructions.td |    5 +++++
 test/CodeGen/R600/zero_extend.ll  |   21 ++++++++++++++++++---
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
index 3baa4cd..5ea08a1 100644
--- a/lib/Target/R600/SIInstructions.td
+++ b/lib/Target/R600/SIInstructions.td
@@ -1807,6 +1807,11 @@ def : Pat <
   (V_CNDMASK_B32_e64 (i32 0), (i32 -1), $src0)
 >;
 
+def : Pat <
+  (i32 (zext i1:$src0)),
+  (V_CNDMASK_B32_e64 (i32 0), (i32 1), $src0)
+>;
+
 // 1. Offset as 8bit DWORD immediate
 def : Pat <
   (SIload_constant i128:$sbase, IMM8bitDWORD:$offset),
diff --git a/test/CodeGen/R600/zero_extend.ll b/test/CodeGen/R600/zero_extend.ll
index 481b3b3..1d1f47c 100644
--- a/test/CodeGen/R600/zero_extend.ll
+++ b/test/CodeGen/R600/zero_extend.ll
@@ -1,14 +1,14 @@
 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
 ; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
 
-; R600-CHECK: @test
+; R600-CHECK: @test1
 ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW
 ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW
 
-; SI-CHECK: @test
+; SI-CHECK: @test1
 ; SI-CHECK: V_MOV_B32_e32 v[[ZERO:[0-9]]], 0
 ; SI-CHECK: BUFFER_STORE_DWORDX2 v[0:[[ZERO]]{{\]}}
-define void @test(i64 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) {
+define void @test1(i64 addrspace(1)* %out, i32 %a, i32 %b, i32 %c) {
 entry:
   %0 = mul i32 %a, %b
   %1 = add i32 %0, %c
@@ -16,3 +16,18 @@ entry:
   store i64 %2, i64 addrspace(1)* %out
   ret void
 }
+
+; R600-CHECK: @test2
+; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW
+
+; SI-CHECK: @test2
+; SI-CHECK: V_CNDMASK_B32_e64 {{v[0-9]}}, 
+; SI-CHECK: BUFFER_STORE_DWORD {{v[0-9]}}, 
+define void @test2(i32 addrspace(1)* %out, i32 %a, i32 %b) {
+entry:
+  %cmp = icmp eq i32 %a, %b
+  %cond = zext i1 %cmp to i32
+  store i32 %cond, i32 addrspace(1)* %out
+  ret void
+}
+
-- 
1.7.10.4



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