[LLVMdev] Instruction itinerary scheduling

[Maurice Daverveldt]

Hi,

I am working on a VLIW processor and I was wondering if anybody could help me with the following problem:

I am trying to use the ScheduleHazardRecognizer to insert nops when this is required for an instruction class. This is working great for load type instructions but for branch instruction this approach is not working. If i am correct the schedule hazard recogniser does not work for instructions that are not in a basic block.

Is there a way to insert a custom delay between different instruction itineraries classes?

To illustrate, in the following situation a nop should be inserted between the def and the use.

	cmp		BR0 = R2, R3
	<NOP>
	branch	BR0

In the following situation a nop is not required:

	cmp		BR0 = R0, R3
	select	R1 = BR0, R2, R3

Any help is appreciated!

Regards,

Maurice Daverveldt