[LLVMdev] X86 disassembler & assembler mismatch
Jun Koi
junkoi2004 at gmail.com
Thu Dec 25 19:54:25 PST 2014
hi,
some instructions mismatch between assembler & disassembler, like below.
it seems this happens with all SSECC related instructions?
thanks,
Jun
$ echo "cmpps xmm1, xmm2, 23" | ./Release+Asserts/bin/llvm-mc -assemble
-triple=x86_64 --output-asm-variant=1 -x86-asm-syntax=intel -show-encoding
.text
cmpps xmm1, xmm2, 23 # encoding: [0x0f,0xc2,0xca,0x17]
$ echo "0x0f,0xc2,0xca,0x17"|./Release+Asserts/bin/llvm-mc -disassemble
-triple=x86_64 --output-asm-variant=1
.text
<stdin>:1:1: warning: invalid instruction encoding
0x0f,0xc2,0xca,0x17
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