[LLVMdev] dmb ishld in AArch64

[Tim Northover]

Hi Chengyu,

On 9 December 2014 at 11:40, Chengyu Song <csong84 at gatech.edu> wrote:
> I guess it’s because "dmb ishst" is not checked/tested? Any quick way to fix this?

That barrier should be treated the same as any other dmb by LLVM. What
I'm most confused about is why it's there in the first place. From
what I can tell, the rcu_assign_pointer function should map to a
native store-release operation (stlr).

Also, isn't the reordering wrong just from a data-dependency point of
view? It looks like it moves the hlist_pprev_rcu(n) access before the
n->pprev assignment. Could be because of an aliasing violation, or it
could be LLVM.

Do you have preprocessed source or LLVM IR handy? (You can get a .i
file from "clang -save-temps" for example).

Cheers.

Tim.