[LLVMdev] Should more vector [zs]extloads be legal for X86 SSE4.1?

[Ahmed Bougacha]

Hi Chandler, all,

Why aren't the vector [zs]extloads introduced by SSE4.1/AVX2 declared
legal? Is it a simple oversight, or did I miss a deeper reason?


While cleaning up PMOV*X patterns, I stumbled upon this braindead testcase:

        %0 = load <8 x i8>* %src, align 1
        %1 = zext <8 x i8> %0 to <8 x i16>

turning into:

        pmovzxbw       (%rsi), %xmm0
        pand   <0xff,0xff,...>, %xmm0, %xmm0

v8i8 isn't legal, so the load became an anyext load from v8i8 to
v8i16, with the pand masking out the unwanted/zero bits.

In that example, if you declare zextloads from v8i8 legal, and add the
simple corresponding pattern, the pand isn't generated anymore, as
expected.

So, unless I'm missing something, shouldn't we declare them legal?
Insights much appreciated, thanks!

- Ahmed