[LLVMdev] understanding DAG: node creation
Sam Parker
S.Parker3 at lboro.ac.uk
Sun Aug 31 14:50:45 PDT 2014
Hi,
Yes, that's what I would do. If you want LLVM and the register allocator to also know that the instruction explicitly defines the register, I would designate the register into it's own register class and have your instruction write to that class (and there will be only a single option for RA).
cheers,
Sam
Sam Parker
Research Student
Electronic Systems Design Group
Loughborough University
UK
________________________________________
From: Dmitri Kovalenko [dmitri.a.kovalenko at gmail.com]
Sent: 31 August 2014 21:53
To: Sam Parker
Cc: llvmdev at cs.uiuc.edu
Subject: Re: [LLVMdev] understanding DAG: node creation
Sam, thanks for your answer.
That's a great suggestion.
And excuse me for maybe dilettante question:
To hard-code use of the global register means to hard-code it in the 'asm string' argument of the instruction definition in the .td file?
2014-09-01 0:44 GMT+04:00 Sam Parker <S.Parker3 at lboro.ac.uk<mailto:S.Parker3 at lboro.ac.uk>>:
Hi Dmitri,
If you have such a simple intrinsic which operates on a single register, just lower the intrinsic to a target specific node which is only implemented by a single instruction. Like you were doing before and by using a chain operand. Hard code the instruction to use and define the global register and only pass the instruction the actual variable argument.
Hope that helps,
Sam
Sam Parker
Research Student
Electronic Systems Design Group
School of Electronic, Electrical and Systems Engineering
Loughborough University
----- Reply message -----
From: "Dmitri Kovalenko" <dmitri.a.kovalenko at gmail.com<mailto:dmitri.a.kovalenko at gmail.com>>
To: <llvmdev at cs.uiuc.edu<mailto:llvmdev at cs.uiuc.edu>>
Subject: [LLVMdev] understanding DAG: node creation
Date: Sat, Aug 30, 2014 22:18
I have an intrinsic and it must be lowered to instruction, which works with fixed register.
So, it takes contents of this register and another argument as input. After execution, the result of the instruction is placed into that same fixed register.
What should I do in SelectionDAGBuilder::visitIntrinicCall to describe such behaviour for a SDNode?
Thank you for the ideas and insights.
--
Sincerely,
Dmitri Kovalenko
--
Sincerely,
Dmitri Kovalenko
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