[LLVMdev] Plan to optimize atomics in LLVM

Tim Northover t.p.northover at gmail.com
Fri Aug 15 02:26:40 PDT 2014


> From my reading of Atomics.rst, it would be sound to reorder (It does not
> say much about load-linked, so I am treating it as a normal load here)
>
>> store seq_cst
>> fence release
>> load-linked monotonic
>
> into
>
>> load-linked monotonic
>> store seq_cst
>> fence release

> Which would make an execution ending in %old_x = %old_y = 0 possible, while
> it is impossible in the original program.

Hmm, evil. Well, I'm convinced. Thanks very much for taking the time
to come up with an example and telling us about it.

> Fixing it is a two line change in insertLeadingFence, but it triggers some
> test failures, both because of tests looking specifically for a fence
> release here,

That's fine, we can change those easily enough. And the "dmb ishst"
(as I understand it, it *is* a release fence, but not almost certainly
not suitable for preventing this reordering).

Cheers.

Tim.



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