[LLVMdev] Signed NaNs in APFloat arithmetic

[Stephen Canon]

Worth noting that –0.0 – x isn't actually correct either, since it fails to flip the sign of –0 if the rounding mode is round toward negative (for platforms that support IEEE-754 rounding modes), and it raises invalid if x is a signaling NaN.  As Owen noted, FP negation really "ought" to be treated as a bitwise operation, rather than mapped into arithmetic.

– Steve

On Aug 8, 2014, at 4:34 AM, Tim Northover <t.p.northover at gmail.com> wrote:

> On 7 August 2014 20:52, Keno Fischer <kfischer at college.harvard.edu> wrote:
>> One more update: Since the code generated by the bitcast wasn't ideal
>> and we were afraid to loose vectorization, etc., we ended up going
>> with fsub -0.0, x, which for some reason unlike fsub 0.0, x, seems to
>> be have appropriately at all optimization levels.
> 
> That's because "fsub 0.0, x" is incorrect for x=+0.0. Took me a while
> to work out why the "obvious" choice didn't work the first time I
> encountered it too.
> 
> Cheers.
> 
> Tim.
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