[LLVMdev] Signed NaNs in APFloat arithmetic

[Keno Fischer]

In r187314, APFloat multiplication by with NaNs was made to always
yield a positive NaN. I am wondering whether that was the correct
decision. It is of course true that the result of a multiplication is
undefined in IEEE, however, we were using multiplication by -1.0 to
implement IEEE negate, which is defined to preserve the sign bit.
r210428 made 0-NaN have IEEE negate behavior, which is good because it
seems to me from r187314 to r210428 there was no compliant way to
implement it in LLVM. Does somebody remember what the arguments for
the behavior change in r187314 were? It seems more sane to me to
preserve the sign bit than to unconditionally overwrite it, especially
considering that the hardware doesn't do it this way.

Thanks,
Keno