[LLVMdev] Proposal: AArch64/ARM64 merge from EuroLLVM
Jiangning Liu
liujiangning1 at gmail.com
Mon Apr 14 22:31:34 PDT 2014
Hi Jim,
2014-04-15 4:28 GMT+08:00 Jim Grosbach <grosbach at apple.com>:
> This sounds reasonable. Thanks, all.
>
> > - CSE of ADRP optimization (Jiangning)
>
> Quentin may have some input here. He’s done quite a lot of optimizations
> for ADRP sequences.
>
> -Jim
>
Thanks for letting me know Quentin may have deep thought around this.
ARM64 generates pseudo instructions ARM64::MOVaddr and friends in ISEL
stage, which intends to guarantee address serialization (page address +
in-page address), and exposes adrp finally by pass ExpandPseudoInsts. The
assumption of ARM64 solution is we don't know the in-page offset can be
fused into load/store or not at compile time, and this assumption would
turn to be not true any longer for the solution of using global merge as I
proposed with the patch.
If simply apply the global merge solution to ARM64, probably we should
avoid generating pseudo instruction MOVaddr and friends in ISEL stage, but
I'm not sure if the LOH solution would still work or not, because,
1) ARM64 link-time optimization depends on LOH.
2) We don't see linker plug-in in LLVM trunk and it would be hard for me to
verify any thoughts.
Any concrete suggestion of combining those different ADRP CSE solutions and
tests would be appreciated!
Thanks,
-Jiangning
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