[LLVMdev] TableGen and computed expressions

[Martin O'Riordan]

Hi LLVMDev,

I am revising an existing LLVM backend for a new variant of our CPU
architecture.  I have looked at other targets, and the approach used by
Hexagon seems to suit most of my needs quite well, so I am using Predicates
to enable/disable instructions for the architectures.  This works very well
for disabling old instructions, and enabling new instructions.

For the remaining instructions there are many which have to be revised, and
these fall into three principal groups:

1.  Those that are very different
    I treat these as if they were an old instruction to be retired
    and a new instruction to be introduced.

2.  Those whose latencies have changed

3.  Those whose mnemonics have changed

For the latter two, I was wondering if there is some way of providing a
computed value instead of a constant?

For example, with the latency issues, the old instruction might have a
latency of 2 - expressed as the constant '2' - while the value for the
revised instruction is '3'.  I would like to be able to provide this value
using a function call ( e.g. 'getLatency()'), or some other externally
computed value.

For the mnemonics I was wondering if it is possible to provide a fragment to
'strconcat' from a function call, or perhaps from an array with an index
(e.g. 'AsmFrag[VALUE]')?

I have tried variants of '[{ code }]' but this does not seem to work for me.

I would like to avoid a wholesale replication of 100s of instruction
patterns that really only differ in minute ways; are there any recommended
ways of doing this type of thing with TableGen?

Thanks,

    Martin O'Riordan - Movidius Ltd.