[LLVMdev] Add support for ldr pseudo instruction in ARM integrated assembler

[Eric Christopher]

On Tue, Oct 29, 2013 at 10:21 AM, Jim Grosbach <grosbach at apple.com> wrote:

>
> On Oct 26, 2013, at 5:02 PM, Chris Lattner <clattner at apple.com> wrote:
>
> On Oct 25, 2013, at 5:22 PM, Sean Silva <chisophugis at gmail.com> wrote:
>
> I’m not sure macros are a good analogy, but there are other
>> pseudo-instructions that we’re not always able to reconstruct in
>> disassembled code back to how the user wrote them. Or if we do, it’s purely
>> via heuristic methods. I don’t see this as a big issue.
>>
>
> I agree.  These pseudo instructions seem like pure syntactic sugar that
> should never be produced by the disassembler.  That doesn't make them bad,
> in fact it makes them simpler to implement and reason about.
>
>
>> Do the ARM usages include allowing a single pseudo-instruction to expand
>> to multiple real instructions? For example, a movw/movt pair? If so, I’m
>> *very* opposed to that part.
>>
>
> Why?  For people writing assembly manually, having pseudo instructions to
> encapsulate common patterns is very useful.
>
>
> An assembler is not a compiler. When reading the assembly code, it should
> be clear what instructions are actually going into the output.
>
>
To back Jim up a little here the ldr pseudo that they're talking about is
similar to the MIPS 'la' instruction. That instruction was the reason for
numerous hacks and pain in the gnu assembler over the years - implementing
it or the ARM equivalent is going to be just as painful here as it was
there. I'm not necessarily against it, I don't really have a feeling either
way, but the impact on the assembler is likely going to be significantly
more than just another instruction.

-eric


> A single assembler instruction, pseudo or otherwise, should represent a
>> single instruction in the final output. Even with a single instruction, I’m
>> still leery, as it makes the source unclear whether a constant load is a
>> plain ‘move’ instruction or a memory reference. That makes it very
>> difficult to read the assembly and do any sort of thinking about
>> performance considerations.
>>
>
> No one is compelled to use these if they don't want to.
>
> x86 has this issue to an extent that goes far beyond what you describe
> here, and FWIW I've never seen a situation where it has been a problem.
> Usually when doing instruction-level/uarch-level optimization I find myself
> disassembling raw bytes in memory or in linked executables (or showing
> relocations in object files). The point of source code (even assembler) is
> to abstract over what is happening in the machine; when you specifically
> want to know what is happening in the machine you should use a tool
> designed to show you that, i.e. a disassembler (that shows raw bytes too).
>
> Also, I think the fact that there are high-profile users (well, I guess
> they are potential users since this is currently broken) that use this
> feature overrides any "elegance"/"simplicity" concern about an instruction
> expanding differently, for the purposes of "is it acceptable to support
> this feature in LLVM if someone will do the work to implement and maintain
> it?".
>
>
> Given that this pseudo instruction is widely implemented and empirically
> used by important code bases like the Linux kernel, it seems like a
> no-brainer to support it IMO.
>
> -Chris
>
>
>
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