[LLVMdev] Enabling MI Scheduler on x86 (was Experimental Evaluation of the Schedulers in LLVM 3.3)

[Chandler Carruth]

On Tue, Oct 15, 2013 at 4:44 PM, Andrew Trick <atrick at apple.com> wrote:

> I decided to look at x86 benchmarks one more time before flipping the
> switch, this time with corei7-avx and vectorize-slp.
>
> I noticed very bad things happening in a couple of the benchmarks. As
> usual, it's only the result of unlucky register assignment, not
> instruction scheduling. But the impact was large enough that I decided to
> fix it first in the interest of avoiding triaging scheduling performance
> bugs. There will be plenty to deal with already.
>
> I just got the AVX dependence breaking checkin in yesterday, so was able
> to flip the switch today: r192750.
>

FYI, sorry for not replying to this thread.

My benchmark showed no significant changes with the switch. Thanks for the
careful benchmarking and analysis Andy!
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