[LLVMdev] basic block missing after MachineInstr packetizing

[杨勇勇]

Hi, all,

When I schedule machine instructions in a VLIW way and packetize them, a
problem is encountered, and I will show it use a simplified case as follows.

############ original instruction sequence
...
insn1
...
jump  LBB0_xx
...
LBB0_xx:
...

############ expected instruction sequence after scheduling and packetizing
insn1; jump LBB0_xx
...
LBB0_xx:
...

############ generated instruction sequence
insn1; jump LBB0_xx
...
#BB#xx:
...

BasicBlock BB#xx is commented out when insn1 and "jump LBB0_xx" is bundled.
I guess the reference to LBB0_xx is deconstructed when insn1 and LBB0_xx
are packetized together thus BB#xx is commented out.

What should we do if the reference to LBB0_xx has to be maintained?

Thanks ahead!

--
杨勇勇 (Yang Yong-Yong)
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