[LLVMdev] loop vectorizer: JIT + AVX segfaults

[Frank Winter]

Is it possible that the AVX support in the JIT engine or x86-64 backend
is not mature? I am getting segfaults when switching from a vector
length 4 to 8 in my application. I isolated the barfing function and it
still segfaults in the minimal setup:

The IR attached implements the following simple function:

void bar(int start, int end, int ignore , bool add , bool addme , float* 
out, float* in)
{
   int loop_start = add ? start+add : start;
   int loop_end = add ? end+add : end;
   loop_start /= 8;
   loop_end /= 8;
   for ( int i = loop_start ; i < loop_end ; ++i )
     for ( int q = 0 ; q < 8 ; ++q )
       out[ i * 8 + q ] = in[ i * 8 + q ];
}

The main.cc program implements the following:

Set loop vectorizer min trip count to 4
Create Module from file (given as program argument)
Set loop vectorizer debug info output
Optimize including loop vectorization
Create payload
Call function
Check result


I tried this on various CPUs. On those which support SSE only this program
works fine (vectorized to length 4). Now, running it on a CPU with AVX
support, the loop vectorizer goes for vector length 8, JIT'ing the function
works still fine but then the call to the function suddenly segfaults.

The LLVM website says that the x86-64 backend includes support for ISA
extensions such as MMX and SSE but it doesn't say explicitly AVX. Is this
on purpose and there's no AVX support?

Frank


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define void @main(i64 %arg0, i64 %arg1, i64 %arg2, i1 %arg3, i64 %arg4, float* noalias %arg5, float* noalias %arg6) {
entrypoint:
  br i1 %arg3, label %L0, label %L1

L0:                                               ; preds = %entrypoint
  %0 = add nsw i64 %arg0, %arg4
  %1 = add nsw i64 %arg1, %arg4
  br label %L2

L1:                                               ; preds = %entrypoint
  br label %L2

L2:                                               ; preds = %L0, %L1
  %2 = phi i64 [ %arg0, %L1 ], [ %0, %L0 ]
  %3 = phi i64 [ %arg1, %L1 ], [ %1, %L0 ]
  %4 = sdiv i64 %2, 8
  %5 = sdiv i64 %3, 8
  br label %L5

L3:                                               ; preds = %L7, %L5
  %6 = phi i64 [ %33, %L7 ], [ 0, %L5 ]
  %7 = mul i64 %32, 8
  %8 = add nsw i64 %7, %6
  %9 = mul i64 %32, 1
  %10 = add nsw i64 %9, 0
  %11 = mul i64 %10, 1
  %12 = add nsw i64 %11, 0
  %13 = mul i64 %12, 1
  %14 = add nsw i64 %13, 0
  %15 = mul i64 %14, 8
  %16 = add nsw i64 %15, %6
  %17 = getelementptr float* %arg6, i64 %16
  %18 = load float* %17
  %19 = mul i64 %32, 8
  %20 = add nsw i64 %19, %6
  %21 = mul i64 %32, 1
  %22 = add nsw i64 %21, 0
  %23 = mul i64 %22, 1
  %24 = add nsw i64 %23, 0
  %25 = mul i64 %24, 1
  %26 = add nsw i64 %25, 0
  %27 = mul i64 %26, 8
  %28 = add nsw i64 %27, %6
  %29 = getelementptr float* %arg5, i64 %28
  store float %18, float* %29
  br label %L7

L4:                                               ; preds = %L7
  %30 = add nsw i64 %32, 1
  %31 = icmp sge i64 %30, %5
  br i1 %31, label %L6, label %L5

L5:                                               ; preds = %L4, %L2
  %32 = phi i64 [ %30, %L4 ], [ %4, %L2 ]
  br label %L3

L6:                                               ; preds = %L4
  ret void

L7:                                               ; preds = %L3
  %33 = add nsw i64 %6, 1
  %34 = icmp sge i64 %33, 8
  br i1 %34, label %L4, label %L3
}
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LLVM=${HOME}/toolchain/install/llvm
CONFIG=$(LLVM)/bin/llvm-config
CXXFLAGS=$(shell $(CONFIG) --cxxflags) -I. -std=c++0x
LDFLAGS=$(shell $(CONFIG) --ldflags)
LIBS=$(shell $(CONFIG) --libs) 

CXX=g++-4.8

OBJS= main.o

TARGET=main

all: $(TARGET)

main: $(OBJS)
	$(CXX) -o $@ $(CXXFLAGS) $^ $(LIBS) $(LDFLAGS)

%.o: %.cc
	$(CXX) $(CXXFLAGS) -c $<

clean:
	rm -rf $(TARGET) $(OBJS) *~